Micron Technology jobs - San Jose, CA
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| Jun 01 | Staff Design Engineer, Physical Design | Cadence Designs | San Jose, CA |
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methodologies and understand deep sub-micron technology issues. Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification,... more |
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| Jun 01 | Sr Design Engineer , Physical Design | Cadence Designs | San Jose, CA |
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methodologies and understand deep sub-micron technology issues. Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification,... more |
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| Feb 15 | Sr Design Engineer , Physical Design | Cadence Design Systems | San Jose, CA |
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methodologies and understand deep sub-micron technology issues. Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification,... more |
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| Jan 13 | Staff Design Engineer, Physical Design | Cadence Design Systems | San Jose, CA |
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methodologies and understand deep sub-micron technology issues. Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification,... more |
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| Jun 01 | 7.09.12 Senior Demand Planner | Micron Technology | Fremont, CA |
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at Lexar Media, Inc., a subsidiary of Micron Technology you will be responsible for driving and supporting one or more segments of the Lexar forecast process and tools producing... more |
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| May 28 | Digital Design Verification Engineer | Artisan | San Jose, CA |
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SoC Design in Deep Sub-Micron Technology Nodes. Strong preference for candidates having prior experience with Memory Controllers, the AMBA Bus Protocol, and external... more |
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| May 22 | SSD System Validation Engineer | Link A Media Devices | Santa Clara, CA |
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has developed unique data recovery IP and technology for both the HDD and SSD markets ... growing market Investors include NEC Seagate Technology and Micron as well as several... more |
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| May 22 | Engineer, Senior Digital IC design | Santa Clara, CA | |
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at least basic knowledge of deep sub-micron CMOS technologies and device physics, understands digital signal processing algorithms, and has solid knowledge of related VLSI... more |
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| May 21 | MTS Analog Design Engineer | AMD | Sunnyvale, CA |
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and characterization of design. Support technology and knowledge transfer to product ... high-speed circuit design and layout in sub-micron CMOS (40nm and below) at data rates of... more |
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| May 19 | Senior Applications Engineer ? Mobile Memory Products | Micron Technology | San Jose, CA |
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engineering expertise and support for Micron's non-volatile mobile device storage ... * Supporting system validation testing for Micron storage solutions in Smartphone... more |
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| May 19 | Product Sales Manager ? SSD | Micron Technology | San Jose, CA |
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As a Product Sales Manager at Micron, you will be responsible for implementing Micron's en ... * The ability to independently present Micron solutions to current and potential... more |
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| May 04 | Analog IC Design for High Speed Fiber Optics | Advanced Technology Search | San Jose, CA |
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test considerations. * Expertise in sub-micron CMOS high speed design. * Expertise in BiCMOS high speed design. * Understanding of CDR design and design techniques for 10Gbps and... more |
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| May 02 | Engineer, Senior Physical Design | Marvell Technology Group | Santa Clara, CA |
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design flow, methodologies and deep sub-micron technology. ? Programming-minded, experience in Makefile/Tcl/Tk/Perl. ? Self-motivated team worker, good verbal and written... more |
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| Apr 30 | Digital Design Verification Engineer | Tellus Solutions | San Jose, CA |
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SoC Design in Deep Sub-Micron Technology Nodes. Strong preference for candidates having prior experience with Memory Controllers, the AMBA Bus Protocol, and external... more |
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| Apr 21 | Digital Design Verification Engineer | ARM | San Jose, CA |
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SoC Design in Deep Sub-Micron Technology Nodes. Strong preference for candidates having prior experience with Memory Controllers, the AMBA Bus Protocol, and external... more |
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| Apr 20 | Senior Analog Design Engineer | Marvell Technology Group | Santa Clara, CA |
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interface using state-of-the-art deep sub-micron CMOS technologies. Experience in one ... required. Strong knowledge on the deep sub-micron CMOS technologies Hands-on experience... more |
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| Apr 16 | Staff Engineer, Analog Mixed Signal Design | Inphi | Santa Clara, CA |
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drivers, equalizers, regulators. Deep sub-micron process design experience at 90nm & 65nm (40nm desirable). A track record of developing high volume commercial products Working... more |
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| Apr 12 | Principal ASIC Design Engineer | LSI | Milpitas, CA |
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for the design of mixed signal ASIC s in sub-micron processes from requirements to production release. The job includes all areas of digital design for Mixed-Signal ASIC... more |
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| Apr 11 | Engineer, Hardware | Marvell Technology Group | Santa Clara, CA |
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design flow, methodologies and deep sub-micron technology. ? Programming-minded, experience in Makefile/Tcl/Tk/Perl. ? Self-motivated team worker, good verbal and written... more |
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| Mar 21 | RF/Analog IC Design Engineer(s) | Samsung | San Jose, CA |
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PLL, Regulators, ADC/DAC, etc., in deep sub-micron CMOS technologies. Ability to comprehend RF transceiver system level requirements and translate into circuit level... more |
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| Mar 01 | Director, Sensor Design & Technology Development | Terran Systems | Mountain View, CA |
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Job Description: Director, Sensor Design & Technology Development ROLE AND RESPONSIBILITY ... The Director, Sensor Design and Technology Development reports to the Vice... more |
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| Feb 10 | Senior ASIC Architect | Brocade Communications Systems | San Jose, CA |
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or to large complex ASIC designs. ? Very strong written and verbal communication skills. ? Familiar with ASIC design flows for deep sub micron technologies. ? Familiar with... more |
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| Feb 10 | Senior ASIC Architect | Brocade | San Jose, CA |
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or to large complex ASIC designs. . Very strong written and verbal communication skills. . Familiar with ASIC design flows for deep sub micron technologies. . Familiar with... more |
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| Feb 02 | Product Engineer - Emerging Memory | Micron Technology | San Jose, CA |
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Product Engineer in the Process R&D group at Micron, you will be evaluating technologies that enable future memory products. These could include magnetic memories (STT-MRAM),... more |
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| Nov 02 | SENIOR ASIC DESIGN ENGINEER (CLOCKS) | NVIDIA | Santa Clara, CA |
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scripting languages - Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects - Prior experience in implementing on-chip clocking networks is a plus -... more |
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